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Add support for the (almost) full RV32I Integer Instruction Set

Ferdinand Bachmann requested to merge full-rv32i into master

This MR adds support for the missing instructions in the RV32I Integer Instruction set.

Branch Instructions:

  • Added BLTU, BGEU

Load/Store Instructions:

  • Added LB, LH, LBU, LHU, SB, SH

Arithmetic Instructions:

  • Added SLT, SLTU

Immediate Instructions:

  • Added SLTI, SLTUI, ANDI, ORI, XORI, SLLI, SRLI, SRAI

Other:

  • Added AUIPC

The only instructions still missing are ECALL and FENCE.

Note that this MR does not yet include testcases for the new instructions.

Edited by Ferdinand Bachmann

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