Skip to content
GitLab
Explore
Sign in
Explore
Projects
Explore projects
All
Most starred
Trending
Makefile
Any
Assembly
Batchfile
BibTeX
C
C++
CMake
CSS
Dockerfile
HTML
Java
JavaScript
Jupyter Notebook
Makefile
Objective-C
Python
Rust
Sage
Shell
SystemVerilog
Tcl
TeX
TypeScript
Unix Assembly
VHDL
Verilog
Oldest created
Sort by
Updated date
Last created
Name
Name, descending
Most stars
Oldest updated
Oldest created
Hide archived projects
Show archived projects
Show archived projects only
E
CON /
examples-2022
0
Updated
Nov 16, 2022
0
0
0
0
Updated
Nov 16, 2022
S
sesys /
Securityweek Physical Side-Channels Lab
Securityweek Physical Side-Channels Lab
0
Updated
Sep 08, 2023
0
0
0
0
Updated
Sep 08, 2023
D
sesys /
DOPE
0
Updated
Aug 28, 2023
0
0
0
0
Updated
Aug 28, 2023
E
CON /
examples-2023
0
Updated
Jan 23, 2024
0
0
0
0
Updated
Jan 23, 2024
C
CON /
CON KU 2023 - Upstream
1
Updated
Jan 17, 2024
1
0
0
0
Updated
Jan 17, 2024
E
sase / practicals / 2023 /
exercise2023-demos
0
Updated
Oct 25, 2023
0
0
0
0
Updated
Oct 25, 2023
L
sase / lecture /
lecture-challenges-upstream
0
Updated
Nov 08, 2023
0
0
0
0
Updated
Nov 08, 2023
P
SIP /
project2
0
Updated
Nov 16, 2023
0
0
0
0
Updated
Nov 16, 2023
I
infosec /
InfoSec 2023 Material
0
Updated
Nov 24, 2023
0
0
0
0
Updated
Nov 24, 2023
I
sesys / iaik-open-flow /
ibex-verilog
Apache License 2.0
0
Updated
Feb 18, 2024
0
0
0
0
Updated
Feb 18, 2024
O
sesys / iaik-open-flow /
open-flow-template
0
Updated
Mar 17, 2024
0
0
0
0
Updated
Mar 17, 2024
O
sesys / iaik-open-flow /
open-flow-asic
Apache License 2.0
0
Updated
Mar 04, 2024
0
0
0
0
Updated
Mar 04, 2024
A
krypto /
Active Secure Geometric Sampler
0
Updated
Dec 22, 2023
0
0
0
0
Updated
Dec 22, 2023
Prev